The present invention relates to a semiconductor device which has an outer shape almost equal in size to a semiconductor chip on which a semiconductor circuit is formed, and has external connection terminals formed in a two-dimensional area.
In recent years, to enhance system performance, demands are arising for a large capacity and high speed in the logic scale of a semiconductor device and the like. Along with this, a larger number of pins and excellent electrical characteristics (load characteristics) are demanded for a package for packaging a semiconductor chip (to be referred to as a chip) on which a semiconductor circuit is formed.
In conventional packages such as an SOP and QFP, the pads of a chip are wire-bonded to a lead frame, and the shape of the lead frame determines electrical characteristics. Since the lead frame must be long to a certain degree, its inductance is difficult to reduce.
To realize a larger number of package pins and excellent electrical characteristics, a package which has an outer shape almost equal in size to a chip and can be mounted on an external printed board by bumps (balls) formed in a two-dimensional area without using any wire bonding has been developed.
FIG. 1A is a plan view showing a conventional package, and FIG. 1B is a sectional view showing the package in FIG. 1A taken along the line 1B--1B. The package shown in FIGS. 1A and 1B is a center pad device in which pads are arranged near the center of a chip, and has the following arrangement.
As shown in FIGS. 1A and 1B, pads 102 are arranged near the center of a chip 100 on which a semiconductor circuit is formed. An organic substrate 106 called an interposer having an opening 104 for exposing the pads 102 is formed on the chip 100. A wiring pattern 108 like the one shown in FIGS. 1A and 1B is formed on the organic substrate 106. An organic substrate 110 is formed on the wiring pattern 108. The organic substrate 110 has an opening so as to expose the opening 104, bonding regions 111 on the wiring pattern 108, and bump formation regions 112 on the wiring pattern 108. The organic substrates 106 and 110 are made of a polyimide film.
Wires 114 for connecting the pads 102 and bonding regions 111 are bonded between them. An insulating film 116, e.g., a molded resin for covering and protecting the wires 114 and their bonded portions is formed in the opening 104. Bumps 118 are formed in the bump formation regions 112 of the wiring pattern 108.
The package having the arrangement as shown in FIGS. 1A and 1B can shorten the distance from each pad 102 of the chip 100 to the corresponding bump 118 serving as an external connection terminal. Hence, this package is lower in inductance between the pad and external connection terminal than a conventional package using a lead frame between the pad and external connection terminal. Thus, this package can cope with high-speed operation. Since the bumps 118 can be arranged in a matrix, the number of pins can be easily increased.
Screening of non-defectives and measurement of various characteristics for the package having the arrangement as shown in FIGS. 1A and 1B will be described. Screening and measurement for this package are done by the following method.
In general, the package is measured after being set in an auxiliary socket called a test carrier in order not to degrade the reliability of the bump 118. In this case, however, the measurement results are affected by the characteristics of the package itself owing to the presence of inductance at a portion connected to the signal line of the test carrier.
When measured characteristics are important, characteristics are measured by bringing the bump 118 of the package into contact with the exposed portion of an impedance-matched wiring pattern on the test board. This measurement can obtain almost accurate characteristics of the package itself because the connected portions except for the bump 118 of the package are impedance-matched. However, the bump 118 is pressed against the wiring pattern, so a contact scratch may be formed on the bump 118 to affect package reliability.
To avoid this, as a method of measuring original package characteristics without forming any contact scratch on the bump 118, the characteristics are measured by connecting the bump of a membrane probe card to a bump formation pad before finally forming the bump 118 on the package. The membrane probe card is constituted by forming a wiring layer and ground potential layer in a organic substrate so as to face each other in order to maintain impedance matching of the wiring layer, and forming a connection bump on the wiring layer. In this membrane probe card, the impedance is not matched at only the bump. However, since the bump is as short as several ten .mu.m, the impedance is substantially matched, and original package characteristics can be measured. Further, this measurement method can substantially measure original package characteristics as far as the bump length on the package is almost equal to the bump length on the membrane probe card.
However, when characteristics are measured by bringing the bump of the membrane probe card into contact with the bump formation region 112 before forming the bump 118 on the package, a contact scratch is formed in the bump formation region 112. A contaminant generated upon contact, such as cutting dust or the like generated when the contact scratch is formed, attaches to the bump formation region 112. The attached contaminant deteriorates tight contact between the bump formation region 112 and bump 118, resulting in low package reliability.